ECE 349b Lectures and HW

week3  (Jan. 18)

        HW1: (1-1 to 1-4;  2-1 and 2-2;

                draw transistor schematic for F=(A+B)C and analyze the switching function;)

Transistor function (continued)  

 Transistor parasitic and latchup

 Design rule

week4   (Jan. 26)

        Labs 1 & 2

HW2 (2-5 to 2-12)

Wire and Via

Stick diagram

Cadence tutorial

　

week5  (Feb. 1)

        Labs 1 & 2

HW3 (2-13 to 2-21)

CMOS logic gates  

Transistor characteristics: transfer curve and noise margin

week6  (Feb. 8)

        HW4 (3-1 to 3-3;

          For the 3.3V supply voltage, draw the approximate voltage transfer curve for an inverter and mark the ,

         ,  and  in your figure.  Specify the status (saturate, linear or cutoff) of the P and transistors for all

         stages of  the transit)

Transistor characteristics: delay and power

VHDL

Synopsys tutorial

week 7 (Feb. 15)

Midterm review

　

Midterm will be Feb. 18.   1pm to 2pm.  SEB2202

week8 (Feb. 22)

                   Spring break

week9   (Mar. 1)    

        Midterm solution

FPGA and top-down design flow

Driving large load & pass logic

week10  (Mar.  8)

        Labs 3 and 4

HW5(3-4 to 3-7; 3-9 to 3-13)

Dynamic logic

RC transmission line

Sequential logic

week11 (Mar. 15)

       Labs 3 and 4

       HW6 (3-15 to 3-21)

Sequential logic (continued)

VHDL and memory

Verilog

　

week12  (Mar. 22)

HW7 (5-1 to 5-5;

          VHDL and verilog code:  four-bit full adder and four-bit counter)

Scale and yield

Routing and simulation

Routing and simulation (continued)

week13

HW8 (4-1, 4-2, 4-6, 5-1, 5-4)

Review Lectures

　

Final (April 23rd, 2005)