THE UNIVERSITY OF WESTERN ONTARIO FACULTY OF ENGINEERING DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING ECE 349b - Introduction to VLSI COURSE OUTLINE - 2002-2003 OBJECT: Progress in microelectronics and advances in very large scale integration (VLSI) made possible single chip electronic systems containing several million active components. This new area of solid state technology presents unique problems of scale and complexity which are made manageable by the computer assisted design methods. SPECIFIC LEARNING OBJECTIVES: Students can expect to learn the basic chip level design methodology. Individual or group design assignments are an integral part of the course. CONTACT HOURS: 3 lecture hours/week, 1.5 hours of laboratory per week. PREREQUISITES: ES021a/b, ECE233b, ECE235b, ECE236b, ECE240a, ECE241b, ECE339a and successful completion of second year of the Electrical and Computer Engineering TOPICS: Semiconductor Physics: Electrons, Quantum Mechanics, Free Electron Theory of Metals Semiconductors, p-n junction, Extrinsic semiconductor, the transistor, metal-semiconductor junctions, metal-insulator-semiconductor junctions. CMOS Fundamentals: Introduction, CMOS design process and fabrication, Transistor transfer function, Design rules, MOSFET Operation, Spice Model, CMOS digital circuits, Area, timing and power analysis of CMOS circuits. ASIC and FPGA Fundamentals: Introduction to VHDL, ASIC and FPGA design flow. RECOMMENDED TEXTBOOK: Wolf, Wayne: Modern VLSI Design Systems on Silicon. Prentice Hall, 3rd Edition. 2002. (ISBN 0-13-989690-2) RECOMMENDED REFERENCE TEXTBOOKS: John P. Uyemura: Introduction to VLSI circuits and systems. John Wiley, 2002. ELECTRONIC INFORMATION: Notes: Unix directory: username: ece480a password: ec.48.EC LASI: www.mrc.uidaho.edu/vlsi/cad_free.html CEAB UNITS: ES 70 % ED 30% ASSIGNMENTS: Problems will be suggested during this course but will be collected and graded. Problem assignments are to be completed outside of class time and will not count toward the final grade. The student is expected to have sufficient competence in digital and analog electronic circuit design, and adequate computing skills to be able to do the assignments. EVALUATION: The final grade will be based on the result of a one-hour intramural term test (approximately mid-term), a three-hour final intramural examination during the examination period, and performance in the design laboratory. All tests and intramural examinations shall be closed book, with no aids permitted (i.e. books, notes, calculators and other information processing devices may not be used during the examinations). For the purpose of evaluation, the course is divided into two components, namely lecture and laboratory. In order to pass the course, the student must obtain a passing grade in each component. In order to obtain a passing grade in the design laboratory, the student must participate in all laboratory sessions. A student who fails either component shall receive a final grade not greater than 48%. To obtain a passing grade in the course a mark of 50% or more must be achieved on the final examination. A final examination mark <50% will result in a final course grade of 48% or less. The approximate weights for the components are shown in the table. Maximum Penalties(*) Component Weight English Presentation Lecture *Term Test *Examination 10% 60% 5% 5% 5% 5% Laboratory 30% 20% 20% All work will be marked first for content after which a penalty not to exceed the maximum shown above may be applied for lack of proficiency in English or presentation. * In accordance with the policy of the University, the grade assigned to all written and oral work presented in English shall take into account syntax, diction, grammar and spelling. In the professional life of an engineer, the manner in which oral and written communications are presented is extremely important. An engineering student must develop these skills as an integral part of the undergraduate program. To encourage the student to do so, the grade assigned to all written and oral work will take into account all aspects of presentation including conciseness, organization and neatness, use of headings and the preparation and use of tables and figures. ATTENDANCE Any student who, in the opinion of the instructor is absent too frequently from class or laboratory periods in any course, will be reported to the Dean (after due warning has been given). On the recommendation of the Department concerned, and with the permission of the Dean, the student will be debarred from taking the regular examination in the course. CHEATING University policy states that cheating, including plagiarism, is a scholastic offence. The commission of a scholastic offence is attended by academic penalties which might include expulsion from the program. If you are caught cheating, there will be no second warning. COURSE INSTRUCTOR: W. Wang (wwang@eng.uwo.ca) EC1006 January 14, 2003